1. Field of the Invention
The present invention generally relates to semiconductor devices and more particularly to a method of manufacturing semiconductor device that reduces undesirable short-channel effects.
2. Description of the Related Art
The threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET) decreases as the gate length or channel length decreases for xe2x80x9cshortxe2x80x9d gate lengths. This is commonly known as the xe2x80x9cshort channel effectxe2x80x9d. This short channel effect increases the off current of the minimum length MOSFET and is one of the constraining limitations in a MOSFET technology. Therefore, there is a need to reduce the short channel effect. Conventionally, the average well doping is increased as the gate length decreases to counter the short channel effect.
It is common practice to introduce higher well doping near the edge of the gate by an angled implantation after the gate is patterned. This is referred to as a xe2x80x9chaloxe2x80x9d implant. The halo implant doping is a larger fraction of the well doping for short gate lengths, thus increasing the average well doping for short gate lengths as compared to long gate lengths. A halo implant has limits in its effectiveness due to its limited spatial extent near the edge of the gate (e.g., the halo implant only exists around the edge of the gate conductor, not in the center region below the gate conductor).
The maximum electrically active dopant concentration achievable by halo implantation is limited by the solid solubility of the implanted dopant. Also, the angle at which the halo implant can be implanted is limited by the height and proximity of an adjacent gate structure which could potentially block the angled halo implant.
The invention includes a method of manufacturing a metal oxide semiconductor field effect transistor (MOSFET). The method forms an insulator layer over a substrate and a doped layer over the insulator layer. Further, the invention patterns a conductor layer over the doped layer. The conductor layer includes gate conductors. The invention implants a second impurity through the conductor layer and into the doped layer. The second impurity is of an opposite type than that of the first type of impurity. Also, the second impurity decreases the concentration of the first impurity in the doped layer. The amount of the second type of impurity that penetrates through the conductor layer into the doped layer changes depending upon the length of the gate conductors within the conductor layer.
The second impurity that penetrates through the conductor layer decreases in concentration as the length of the gate conductors decreases. Also, the decrease in the amount of the second impurity increases the concentration of the first impurity that remains in the doped layer. The invention anneals the MOSFET structure after the implanting process. The doped layer is formed by a deposited doped layer and an undoped layer followed by doping implantation.